15-bit voltage-to-time ADC for “Proper Function” anemometer linearization

Awhile back I published a simple design idea for a thermal airspeed sensor based on a self-heated Darlington transistor pair. The resulting sensor is simple, sensitive, and solid-state, but suffers from a radically nonlinear airspeed response, as shown in Figure 1.

Figure 1 The Vout versus airspeed response of the thermal sensor is very nonlinear.

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Veteran design idea contributor Jordan Dimitrov has provided an elegant computational numerical solution for the problem that makes the final result nearly perfectly linear. He details it in Proper function linearizes a hot transistor anemometer with less than 0.2 % error.

However, a consequence of performing linearization in the digital domain after analog to digital conversion is a significant increase in required ADC resolution, e.g., from 11 bits to 15, here’s why…

Acquisition of a linear 0 to 2000 fpm airspeed signal resolved to 1 fpm would require an ADC resolution of 1 in 2000 = 11 bits. But inspection of Figure 1’s curve reveals that, while the full scale span of the airspeed signal is 5 V, the signal change associated with an airspeed increment of 1999 fpm to 2000 fpm is only 0.2 mV. Thus, to keep the former on scale while resolving the latter, needs a minimum ADC resolution of:

1 in 5 / 0.0002 = 1 in 25,000 = 14.6 bits

15-bit (and higher resolution) ADCs are neither rare nor especially expensive, but they’re not usually integrated peripherals inside microcontrollers as mentioned in Mr. Dimitrov’s article. So, it seems plausible that a significant cost might be associated with provision of an ADC with resolution adequate for his design. I wondered about what alternatives might exist.

Here’s a design for simple and cheap high-resolution ADC built around an old, inexpensive, and widely available friend: the 555 analog timer chip.

See Figure 2 for the schematic.

Figure 2 High resolution voltage-to-time ADC suitable for self-heated transistor anemometer linearization. An asterisk denotes precision components (1% tolerance).

Signal acquisition begins with the R2, R3, U1 summation network combining the 0 to 5 V input signal with U1’s 2.5v precision reference to form:

V1 = (Vin + 2.5v)/2 = 1.25 to 3.75v = (0 to 3) * 1.25v

V1 accumulates on C1 between conversion cycles with a time constant of:

(R2R3/(R2 + R3) + R1)C1 = 1.1M * 0.039 µF = 42.9 ms

Thus, for 16 bit accuracy, a minimum settling time is required of:

42.9 ms LOGe(216) = 480 ms

The actual conversion cycle can then be started by inputting a CONVERT command pulse (>2.5v amplitude and >1 microsecond duration) to the 555 Vth (threshold) pin 6 as illustrated in Figure 3.

Figure 3 ADC cycle begins with a CONVERT Vth pulse that generates an OUT pulse of duration Tout = LOGe(V1 / 1.25 V)R1C1.

The OUT pulse (low true) begins with the rising edge of CONVERT and is coincident with the 555 Dch (discharge) pin 7 being driven to zero volts, beginning the discharge of C1 from V1 to the 555 trigger voltage (Vtrg = Vc/2 = 1.25v) on pin 7. The duration of C1 discharge and Tout, accumulated digitally (a counter of 16 bits and resolution of 1µs is adequate) by a suitable microcontroller, are given by:

Tout = LOGe(V1 / 1.25 V)R1C1 = LOGe(V1 / 1.25 V) 1M * 0.039 µF

= LOGe((Vin + 2.5 V) / 2.5 V) 39 ms

= LOGe(1) 39 ms = 0 for Vin = 0

= LOGe(3) 39 ms = 42.85 ms for Vin = 5 V

At the end of Tout, Dch is released so the recharge of C1 can commence, and the conversion result:

(N = 1 MHz * Tout)

is available for linearization computation. The math to decode and recover Vin is given by:

Vin = 2.5 V (EXP(N / 39000) – 1)

A final word. You may be wondering about something. Earlier I said a resolution of 1 part in 25000 = 14.6 bits would be needed to quantify the Vin delta between 1999 and 2000 fpm. So, what’s all this 42850 = 15.4 bits stuff?

The 42850 thing arises from the fact that the instantaneous slope (rate of change = dV/dT) of the C1 discharge curve is proportional to the voltage across, and therefore the current through, R1. For a full-scale input of Vin = 5 V, this parameter changes by a factor of 3 from V1 = 3.75 V and 3.75 µA at the beginning of the conversion cycle to only 1.25 V and 1.25 µA at the end. This increase in dV/dT causes a proportional but opposite change in resolution. Consequently, to achieve the desired 25000:1 resolution at Vin = 5 V, a higher average resolution is needed.

The necessary resolution factor bump is square root (3) = 1.732… of which 42850 / 25000 = 1.714 is a rough and ready, but adequate, approximation.

Stephen Woodward’s relationship with EDN’s DI column goes back quite a long way. Over 100 submissions have been accepted since his first contribution back in 1974.

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15-bit voltage-to-time ADC for “Proper Function” anemometer linearization

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