The ubiquity of the 4 to 20mA current loop in analog process monitoring and control creates possibilities for peculiar designs of circuits for unusual accessory functions. Figure 1 shows an example. It does precision conversion of 4—20mA…
http://institutionofelectronics.ac.uk/wp-content/uploads/2022/12/IOE_LOGO.png00whdsolutionshttp://institutionofelectronics.ac.uk/wp-content/uploads/2022/12/IOE_LOGO.pngwhdsolutions2026-06-10 13:37:572026-06-10 13:37:574mA-20mA to 0mA-20mA converter’s current mirror drives grounded load
In 2025, Innodisk launched the “AI beyond the edge” initiative at a forum that also hosted Intel, Nvidia, and Qualcomm, which shared details of their latest developments in edge AI. But what does “AI beyond the edge” really mean?
Don…
http://institutionofelectronics.ac.uk/wp-content/uploads/2022/12/IOE_LOGO.png00whdsolutionshttp://institutionofelectronics.ac.uk/wp-content/uploads/2022/12/IOE_LOGO.pngwhdsolutions2026-06-09 17:15:152026-06-09 17:15:15Edge AI deployment made easy for system integrators
How to design a simpler filter (or filter-like circuit) with a varying time constant dependent on what kind of waveform is fed to it.
Discussions with some former coworkers have focused on how to design a filter or circuit with filter-like…
Take two, two years later. That’s the 2026 WWDC in a nutshell, at least for developers. And for consumers? If your Apple Watch is more than a few years old, it’s headed for retirement-and-replacement.
Ironically, albeit not atypically, Apple…
http://institutionofelectronics.ac.uk/wp-content/uploads/2022/12/IOE_LOGO.png00whdsolutionshttp://institutionofelectronics.ac.uk/wp-content/uploads/2022/12/IOE_LOGO.pngwhdsolutions2026-06-09 10:10:242026-06-09 10:10:24Apple’s question for the developer: Are you up for an AI do-over?
Memory customization is not always a top priority when a design team plans a new system-on-chip (SoC) project. But often it should be.
This may not be an obvious statement. Granted, SRAM claims a lot of area on most SoCs. The speed and power…
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Connectivity is all well and good…well, sort of, as it invariably comes with a price, literally and/or figuratively. Simple’s sometimes best, all things considered, and ambient-light power’s also nice.
When you want to monitor and adjust…
http://institutionofelectronics.ac.uk/wp-content/uploads/2022/12/IOE_LOGO.png00whdsolutionshttp://institutionofelectronics.ac.uk/wp-content/uploads/2022/12/IOE_LOGO.pngwhdsolutions2026-06-08 13:46:162026-06-08 13:46:16Not smart, but solar: Analyzing another thermo-plus-hygrometer
Fifteen miles above you, a small styrofoam box is shrieking into the void. Its voice is binary—relentlessly transmitting temperature, pressure, and wind speed from the freezing stratosphere. In two hours, it will be gone, torn apart by the…
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A new technology addresses a key performance barrier limiting the use of GaN-on-silicon semiconductors in mainstream RF applications. According to Scott Bibaud, president and CEO of Atomera, this will change the economics of GaN in RF by unlocking…
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Editor’s note: This is a multi-part series on how to design a digital-controlled PFC. Previous entries:
How to design a digital-controlled PFC, Part 1
How to design a digital-controlled PFC, Part 2
How to design a digital-controlled PFC,…
http://institutionofelectronics.ac.uk/wp-content/uploads/2022/12/IOE_LOGO.png00whdsolutionshttp://institutionofelectronics.ac.uk/wp-content/uploads/2022/12/IOE_LOGO.pngwhdsolutions2026-06-05 13:35:162026-06-05 13:35:16How to design a digital-controlled PFC, Part 4
Any discussion of modern AI system performance must include MLCommons and its MLPerf benchmark suite, which has become the industry’s de facto standard for measuring machine learning performance. Since its debut in 2018, MLPerf has provided…
http://institutionofelectronics.ac.uk/wp-content/uploads/2022/12/IOE_LOGO.png00whdsolutionshttp://institutionofelectronics.ac.uk/wp-content/uploads/2022/12/IOE_LOGO.pngwhdsolutions2026-06-05 10:32:202026-06-05 10:32:20MLPerf and the rise of latency-aware LLM benchmarking
Clock speeds get faster. Per-cycle (and per-clock edge) address and data dollops get larger. And protocols get more efficient. But here we’re talking about external, not internal, buses.
Back in 2023, I devoted two blog posts’ worth of content…
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Recent frontier LLM inference benchmarks have highlighted a recurring pattern. GPU-based systems deliver outstanding throughput when latency is not a concern, but their performance drops sharply once real-time response requirements are imposed.
This…
http://institutionofelectronics.ac.uk/wp-content/uploads/2022/12/IOE_LOGO.png00whdsolutionshttp://institutionofelectronics.ac.uk/wp-content/uploads/2022/12/IOE_LOGO.pngwhdsolutions2026-06-04 07:57:592026-06-04 07:57:59The hidden bottleneck in LLM inference and the impact on MLPerf benchmarking
4mA-20mA to 0mA-20mA converter’s current mirror drives grounded load
Edge AI deployment made easy for system integrators
Derivative-controlled low pass filter, simplified
Apple’s question for the developer: Are you up for an AI do-over?
Would custom memory ease your SoC design?
Not smart, but solar: Analyzing another thermo-plus-hygrometer
Radiosondes: Disposable guardians of the sky
The RF-ready GaN-on-silicon with lower parasitic losses
How to design a digital-controlled PFC, Part 4
MLPerf and the rise of latency-aware LLM benchmarking
Memory card interfaces keep pace with the internal bus evolution race: Part 1
The hidden bottleneck in LLM inference and the impact on MLPerf benchmarking