How to control a qubit? With a quantum error correction stack
There are many challenges to build a useful quantum computer. The core issue is that the quantum bits—qubits—that run the quantum calculations are incredibly unreliable, breaking down when they encounter the slightest environmental noise, causing errors.
It’s a complex, multi-disciplinary challenge and one that’s vital to tackle if we ever want to scale quantum computers to the point where they can do something useful for society. It’s also a fascinating problem to work on; it may surprise you to know that we rely on many classical engineering skills to build our quantum control systems.
Classical hardware design verification is one of the tools to ensure that we build the system right. Design verification is where you prove or test that the system meets its specifications. In other words, given the input, you get the output you expected.
Needless to say, without design verification, we cannot ensure that we’re controlling the qubits in the right way. It’s a necessary tool to ensure that we are building the right quantum error correction stack for hardware companies. It’s the tool that will ensure that we are engineering tomorrow’s fault-tolerant systems.
In a paper published at this year’s DVCon Europe in Munich, and made available on arXiv, Riverlane explains how classical device verification techniques are used to verify the control system: Deltaflow.Control.
The quantum error correction stack will verify the control system in quantum computers. Source: Riverlane
Riverlane is building a quantum error correction stack to help correct qubit errors. The effort encompasses building a scalable control and calibration system to reduce errors and create reliable qubits.
Next-generation control system
Going back to other industries and to previous endeavors, many of the components used in such control systems have been built before. These include:
Radio frequency (RF) signal generation (currently used across 5G networks)
Distributed computing (used for large-scale networks such as the Internet)
Real-time systems (a vital component in industrial control, autonomous vehicles and aerospace/defense applications
But what we have never done is to build a system where all these components must work together at the same time and place. This is exactly the challenge that we face when building a quantum control system.
The quantum error correction stack requires an entirely new system architecture to be designed and built—one that is scalable as qubit numbers increase. That’s a huge undertaking, and the new arXiv paper focuses on the classical hardware verification methodologies that we need to verify the Deltaflow.Control system as we move from our current Control System (called DC1, which is capable of controlling tens of qubits) to the next generation system DC2.
The paper describes how the new DC2 system balances tight power, memory, and latency constraints to create control signals that enable high-precision manipulation of the amplitude, frequency and phase of the waveforms. The more accurately we can manipulate these parameters, the better we can control the quantum state.
DC2 is a system architecture for a distributed system that offers compute at different levels of the quantum error correction stack. It enables developers to integrate their systems at the appropriate levels. Moreover, DC2 is portable across different quantum hardware types.
When it comes to verifying DC2, we use all the classical verification techniques that we have in our armour: universal verification methodology (UVM), SystemC modeling environments, golden model-based verification, formal verification, and in-lab testing.
In the paper, we also describe how we use more modern “shift left” agile software approaches such as a continuous integration to do “full stack” testing.
Samin Ishtiaq is head of software at Riverlane, a quantum computing company based in Cambridge, UK.
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