Optical PHYs facilitate 200G/lane speeds for AI clusters
Semiconductor compute has grown drastically over the past 18 to 24 months amid the vast artificial intelligence (AI) infrastructure buildup. Nvidia and hyperscalers have made many announcements about migrating to GPUs with 200 Gbps per lane…
Injection locking acts as a frequency divider and improves oscillator performance
Injection locking [1] can not only improve oscillator frequency stability and phase noise, but act as a selective frequency divider as well [2][3].
You can find sample setups of a simple two-transistor LC-based Peltz oscillator acting as a selective…
Google’s Pixel Smartphone Line: Extended and…Distended?
A few weeks ago, I told you about (among other things) the iPhone 16e, Apple’s latest “entry-level” smartphone and the pricier successor to the three-generation iPhone SE series:
I couldn’t resist noting that Google had responded to…
HBM memory and AI processors: Happy together
High-bandwidth memory (HBM) is again in the limelight. At GTC 2025, held in San Jose, California, from 17 to 21 March, SK hynix displayed its 12-high HBM3E devices for artificial intelligence (AI) servers. The Korean memory maker also showcased…
Design a feedback loop compensator for a flyback converter in four steps
Due to their versatility, ease of design, and low cost, flyback converters have become one of the most widely used topologies in power electronics. Its structure derives from one of the three basic topologies—specifically, buck-boost topology.…
NVIDIA switches scale AI with silicon photonics
NVIDIA’s Spectrum-X and Quantum-X silicon photonics-based network switches connect millions of GPUs, scaling AI compute. They achieve up to 1.6 Tbps per port and up to 400 Tbps aggregate bandwidth. NVIDIA reports the switch platforms use 4x…
Broad GaN FET lineup eases design headaches
Nexperia has expanded its GaN FET portfolio with 12 new E-mode devices, available in both low- and high-voltage options. The additions address the demand for higher efficiency and compact designs across consumer, industrial, server/computing,…
MCUs support ASIL C/SIL 2 safety
Microchip’s AVR SD entry-level MCUs feature built-in functional safety mechanisms and a dedicated safety software framework. Intended for applications requiring rigorous safety assurance, they meet ASIL C and SIL 2 requirements and are developed…
Snapdragon G chips drive next-gen handheld gaming
Qualcomm unveiled the Snapdragon G series, a lineup of three chips for advanced handheld, dedicated gaming devices. The G3 Gen 3, G2 Gen 2, and G1 Gen 2 SoCs support various play styles and form factors, enabling gamers to play cloud, console,…
Hot-swap controller protects AI servers
The XDP711-001 48-V digital hot-swap controller from Infineon offers programmable SOA current control for high-power AI servers. It provides I/O voltage monitoring with an accuracy of ≤0.4% and system input current monitoring with an accuracy…
Can a free running LMC555 VCO discharge its timing cap to zero?
Frequent design idea (DI) contributor Nick Cornford recently published a synergistic pair of DIs “A pitch-linear VCO, part 1: Getting it going” and “A pitch-linear VCO, part 2: taking it further.”
Wow the engineering world with your…
Data center solutions take center stage at APEC 2025
This year during APEC, much of the focus on the show floor revolved around data center tech, with companies showcasing high-density power supply units (PSU), battery backup units (BBU), intermediate bus converters (IBC), and GPU solutions (Figure…
