How Arm Total Design is built around 5 key building blocks

The ecosystem has been Arm’s key strength and is evident from its latest initiative: Arm Total Design. After unveiling the Neoverse Compute Subsystems (CSS)—high-end cores for infrastructure applications like AI, cloud, data center, and networking applications—the Cambridge, UK-based IP house has followed up with a full-fledged semiconductor design ecosystem.

The ecosystem covers all stages of silicon development. That’s critical for Arm while it competes with a well-entrenched x86 processor ecosystem for infrastructure and data center chips. So, Arm is striving to facilitate an industry-wide alignment on the fundamental interfaces and system architectures to cost-effectively enable custom silicon around system-on-chip (SoC) and multi-die chiplet designs.

Figure 1 Arm Total Design is an ecosystem initiative committed to quickly and efficiently bringing Neoverse CSS-based silicon designs to market. Source: Arm

But how does Arm Total Design complement custom silicon solutions built around Neoverse CSS cores? This blog segments Arm’s ecosystem initiative into five key building blocks spanning every silicon development stage.

Figure 2 Arm Total Design aims to facilitate chip designers across a unified platform comprising ASIC design houses, IP vendors, EDA tool providers, foundries, and firmware developers. Source: Arm

Pre-validated IPs

IP vendors are onboard with pre-integrated and pre-validated solutions for Neoverse CSS silicon, which allows chip suppliers to rapidly deploy new designs while taking advantage of the vast IP ecosystem. The partnerships are expected to accelerate silicon designs by integrating IPs covering areas like memory, security, and peripherals.

For instance, Alphawave Semi has joined the initiative with its high-speed connectivity IP and chiplet platforms while Rambus brings high-performance interface controller and security IPs to the table.

EDA toolsets

Arm Total Design has also partnered with EDA companies like Cadence and Synopsys to facilitate access to a wide range of tools and solutions to assist with Neoverse-based designs. With a robust software-to-silicon approach, this initiative aims to enable chip designers to quickly design and verify Arm-based SoC designs.

Cadence, which brings full-flow system-level design verification and implementation solutions to the program, has validated its digital design, verification, and IP solutions for Arm Neoverse CSS. Likewise, Synopsys is sharing its IP portfolio, hardware-assisted verification solutions, and full-stack AI-driven EDA suite.

Chip design services

Semiconductor design houses such as ADTechnology, Capgemini, Faraday, Socionext, and Sondrel are also part of Arm Total Design to offer services ranging from concept through every stage to final chips. Such collaborations can ensure that multi-million-dollar investment in a new chip design progresses smoothly with every stage being handled by experts.

Take Capgemini, a semiconductor expert in advanced geometries and complex architectures. Then there is Faraday, which provides design services in areas like CPU subsystem integration and 2.5D/3D advanced packaging. Also, Socionext, a supplier of custom SoC services for hyperscale data centers, networking and automotive, is bringing I/O and application-specific chiplet designs to the Neoverse CSS ecosystem.

Foundry partners

Fabs, an indispensable part of the semiconductor design ecosystem, have also joined the Arm Total Design program. The fact that TSMC and Intel Foundry Services (IFS) are onboard means that Arm’s Neoverse CSS silicon solutions will be optimized for advanced process nodes and next-generation packaging technologies.

It’s critical because Neoverse CSS cores, targeted at infrastructure applications such as AI, cloud and date centers, will likely be implemented in ultra-complex, compute-intensive SoCs manufactured at advanced process nodes. According to Arm, Neoverse CSS silicon is being developed on TSMC’s 2-nm node to target server CPUs, data center AI edge, and 5G/6G infrastructure.

Moreover, advanced packaging techniques will be part of the equation when it comes to collaboration with large fabs like TSMC and IFS. For example, TSMC has acknowledged working with Arm to optimize 3DFabric technologies to reach an entirely new level of performance for AI, HPC, and mobile applications.

Firmware support

Arm Total Design will also feature commercial software and firmware support for Neoverse CSS cores from firmware providers like AMI. The tie-up with firmware developers will help accelerate and simplify the development of Neoverse CSS-based systems in an era of heterogenous computing. Especially, when commercial firmware solutions can be developed long before silicon availability.

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