• Become a member
  • Log In
The Institution of Electronics
  • Home
  • About us
    • Our Objectives
    • Our History
    • Governance of the Institution
  • The Electron Magazine
    • 2024
      • 2024 – Winter
      • 2024 – Spring
      • 2024 – Summer
      • 2024 – Autumn
    • 2025
      • 2025 – Winter
      • 2025 – Spring
      • 2025 – Summer
      • 2025 – Autumn
    • 2026
      • 2026 – Winter
  • Members
    • Membership Grades and Fees
    • Members’ Resources
      • The Electron Newsletter
      • The Archives
  • Education and Projects
    • National Electronics Competition
    • Student Members’ Projects
    • Arkwright Engineering Scholarships
  • News
  • Contact Us
  • Menu Menu
Uncategorised

Memory platform tackles AI bottlenecks

NEO.AI is a memory platform from NEO Semiconductor that overcomes SRAM and DRAM scaling limitations in AI memory systems. As part of the platform launch, NEO Semiconductor is introducing its X-SRAM technology for on-chip memory in GPUs and AI processors and reporting its latest progress on 3D X-DRAM, a high-capacity memory technology for HBM.

By replacing conventional six-transistor SRAM with a two-transistor architecture, X-SRAM enables up to 5 times higher memory density to support 1–2 GB of on-chip memory, according to NEO. The technology maintains SRAM-class performance and is compatible with advanced nanosheet CMOS processes. It also provides a path toward future monolithic 3D X-SRAM implementations.

Built on 3D NAND manufacturing processes, 3D X-DRAM delivers up to 10 times higher memory capacity than conventional DRAM, according to NEO. Successful proof-of-concept validation demonstrates its potential as a scalable and manufacturable solution for next-generation HBM.

For more information, visit the NEO X-SRAM webpage.

NEO Semiconductor 

The post Memory platform tackles AI bottlenecks appeared first on EDN.

13 August 2026
http://institutionofelectronics.ac.uk/wp-content/uploads/2022/12/IOE_LOGO.png 0 0 whdsolutions http://institutionofelectronics.ac.uk/wp-content/uploads/2022/12/IOE_LOGO.png whdsolutions2026-08-13 05:08:332026-08-13 05:08:33Memory platform tackles AI bottlenecks

Latest news

  • Four-channel USB-UART IC boosts server management13 August 2026 - 05:08
  • eFuse speeds overcurrent detection13 August 2026 - 05:08
  • Memory platform tackles AI bottlenecks13 August 2026 - 05:08
  • 6.5-kV SiC MOSFET reaches 8-kV blocking13 August 2026 - 05:08
  • Made by Google 2026: This limited silicon-supply situation really sucks13 August 2026 - 05:08
  • Cheap and cheerful LMC555 RC PWM pulse generator12 August 2026 - 13:56
  • Record high wafer shipments. Can fabs keep pace?12 August 2026 - 07:51
  • Analog uncertainty-aware design: How it replaces Monte Carlo with certifiable yield intelligence11 August 2026 - 16:31
  • Automotive low side output switch architecture suitable for 8 to 48 volt buses and beyond11 August 2026 - 13:26
  • Inference 2.0: How enterprise AI is reshaping AI system architectures11 August 2026 - 07:19
IOE LOGO 2

Become a member

click here

Become a member

click here

Become a subscriber

click here

Become a sponsor

click here

© Copyright - The Institution of Electronics | Website by WHD Solutions
  • Link to LinkedIn
  • Link to Facebook
  • Link to X
Link to: 6.5-kV SiC MOSFET reaches 8-kV blocking Link to: 6.5-kV SiC MOSFET reaches 8-kV blocking 6.5-kV SiC MOSFET reaches 8-kV blocking Link to: eFuse speeds overcurrent detection Link to: eFuse speeds overcurrent detection eFuse speeds overcurrent detection
Scroll to top Scroll to top Scroll to top