EDA’s big three compare AI notes with TSMC

The premise of artificial intelligence (AI) transforming the semiconductor industry is steadily taking shape, and two critical venues to gauge the actual progress are leading EDA houses and silicon foundries. The three major EDA toolmakers—Cadence, Synopsys, and Siemens EDA—have recently telegraphed their close collaboration on AI-driven design flows for TSMC’s advanced chip manufacturing nodes.

For a start, semiconductor fabs must have accurate lithography models for optical proximity correction in advanced manufacturing nodes. Huiming Bu, VP of Global Semiconductor R&D and Albany Operations at IBM Research, acknowledges that utilizing artificial intelligence and machine learning accelerates the development of highly accurate models that yield the best results during silicon fabrication.

On the design side, AI-powered EDA software is helping optimize complex IC designs while facilitating migration toward 2D/3D multi-die architectures. “Increased complexity, engineering resource constraints and tighter delivery windows were challenges crying out for a full AI-driven EDA software stack from architectural exploration to design and manufacturing,” said Shankar Krishnamoorthy, GM of Synopsys EDA Group.

Below is a brief recap of EDA toolmakers’ current liaison with TSMC centered on AI-driven design flows for advanced process nodes.

Start with Cadence Design Systems, working closely with TSMC on Cadence.AI, a chips-to-systems AI platform that spans all aspects of design and verification while facilitating digital and analog design automation using AI tools. The two companies are also collaborating on the Cadence Joint Enterprise Data and AI (JedAI) Platform, which employs generative AI for design debug and analytics.

Figure 1 The JedAI platform for generative AI applications provides workflow automation, model training, data analytics, and large language model (LLM) services. Source: Cadence

Synopsys has also its own AI-driven EDA suite Synopsys.ai for design, verification, testing and manufacturing of advanced digital and analog chips. Synopsys.ai includes DSO.ai, an AI application for optimizing layout implementation workflows, and VSO.ai, an AI-driven verification solution.

The company’s CEO Sassine Ghazi told the Synopsys User Group (SNUG) conference audience that Synopsys.ai has achieved hundreds of tape-outs to date and is delivering more than a 10% boost in performance, power, area (PPA), double-digit improvements in verification coverage, and 4x faster analog circuit optimization when compared to optimization without the use of AI.

Figure 2 Synopsys.ai offers AI-driven workflow optimization and data analytics solutions meshed with generative AI capabilities. Source: Synopsys

Like Cadence and Synopsys, Siemens EDA is extending its AI-centric collaboration with leading fabs like Intel Foundry and TSMC. Its new Solido Simulation Suite features AI-accelerated simulators for IC design and verification. The company has also unveiled Catapult AI NN software for High-Level Synthesis (HLS) of neural network accelerators integrated into application-specific integrated circuits (ASICs) and system-on-chips (SoCs).

Figure 3 Solido Simulation Suite integrates AI-accelerated SPICE, Fast SPICE, and mixed-signal simulators to help engineers accelerate critical design and verification tasks. Siemens EDA

AI in the semiconductor industry is still in its infancy, and these efforts to create AI-optimized design flows mark baby steps for infusing AI into the electronics design realm. However, the timing seems right, given how advanced nodes are desperately seeking intelligent solutions to bolster yields and silicon defect coverage.

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