AI tool minimizes EM/IR impact on IC designs
The Cadence Voltus InsightAI platform uses generative AI to identify the root cause of electromigration (EM) and voltage (IR) drop early in the design process. It not only automatically identifies EM/IR violations, but also implements the most efficient fix to improve power, performance, and area (PPA). According to Cadence, Voltus InsightAI allows chip designers to fix up to 95% of violations prior to signoff and accelerate EM/IR closure.
Voltus InsightAI employs machine learning methods for fast incremental IR analysis to enhance on-chip and chiplet power integrity. Its IR inferencing engine uses proprietary neural networks to build models of the power grid, while incremental IR analysis provides instant feedback on the impact of design changes. Deep learning allows Voltus InsightAI to discover the root cause of IR drop problems and identify aggressors, victims, and resistance bottlenecks.
Generative AI algorithms perform timing and DRC-aware fixes of IR drop using methods like placement, grid reinforcement, routing, and engineering change orders. Voltus InsightAI selects the best fix based on the root cause of the problem, driving better utilization and improved PPA.
Voltus InsightAI seamlessly integrates with Cadence digital tools for complete IR design closure, including the Innovus implementation system, Tempus timing solution, Voltus IC power integrity solution, and Pegasus verification system.
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