64-bit soft SoC expands FPGA processing
Efinix offers the Sapphire RV64, a configurable 64-bit RISC-V soft SoC optimized for the company’s Trion and Titanium FPGAs. The SoC incorporates a cached RISC-V processor core and optionally includes a DDR DRAM controller interface. It also supports a range of peripherals.
Sapphire RV64 is designed for embedded and edge AI applications that require more addressable memory, cache, and I/O capability than 32-bit cores can provide while still demanding the small footprint and low power of an FPGA-based solution. It extends the architecture of the 32-bit Sapphire RV32 SoC in several key areas:
- Seven-stage pipeline implementing the RISC-V64IM ISA, with optional A, F, D, C, Zba, Zbb, Zbs, and Zicbom extensions.
- Configurable memory hierarchy with 4 to 512 KB of on-chip RAM, multi-way L1 instruction and data caches, and optional L2 cache, branch predictor, and hardware and software prefetchers.
- Linux support with an optional SV39 memory management unit.
- Memory performance and flexibility for AI workloads, with an optional controller supporting DDR3, HyperRAM, and LPDDR4x at up to 3,200 Mbps.
- Debug capabilities with extensive debug support and native FPGA co-debug.
Sapphire SoCs are configured through the IP Manager and supported by the Efinity IDE and Eclipse-based RISC-V Embedded Software IDE.
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