No floating nodes
The schematic below was screen-shot from a LinkedIn group. I heard alarm bells go off in my head when I saw it (Figure 1).
Figure 1 A suggested application note diagram found in a LinkedIn group with a floating node between C4 and C5 that could…
The promise of OTS-only memories for next-gen compute
For several decades, the semiconductor industry has been looking for alternative memory technologies to fill the gap between dynamic random-access memory (DRAM), the compute system’s main memory, and NAND flash—the system’s storage medium—in…
Efficient voltage doubler is made from generic CMOS inverters
When a design needs auxiliary voltage rails and the associated current loads are modest, capacitor pump voltage multipliers are often the simplest, cheapest, and most efficient way to make them.
Wow the engineering world with your unique design:…
Parsing PWM (DAC) performance: Part 3—PWM Analog Filters
Editor’s Note: This is a four-part series of DIs proposing improvements in the performance of a “traditional” PWM—one whose output is a duty cycle-variable rectangular pulse which requires filtering by a low-pass analog filter to produce…
