Solar-mains hybrid lamp

Introduction

Solar day lamps (SDL) are simple and cost-effective. A few examples of SDLs have been described in [1], [2] and [3]. An SDL without any energy storage element suffers from frequent changes in the light intensity. Also, a backup is required after sunset. The design of a hybrid lamp is given here. It uses solar PV panels and mains power sources and provides constant light output. This design can utilize solar energy even when the panel output is down to 10%. Proportionately, that much load is reduced on the mains supply.

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Block diagram

The block diagram of proposed hybrid lamp is shown in Figure 1. It consists of an array of LEDs lamps: A1 to A9. Each of these lamps consists of five, 1 W white LEDs connected in series. These LEDs are controlled using the LED driver circuits.

Figure 1 Block diagram of the hybrid lamp design with 9 LEDs lamps where each lamp consists of five, 1 W white LEDs connected in series and all LEDs are controlled using LED driver circuits.

LEDs are powered using a 30 watt-peak (Wp) PV panel as well as from an adapter (AC-DC converter) as shown in Figure 1. The LED drivers are controlled through 9 digital output (DO) pins of the MCU. Solar panel voltage Vpvs is sensed using a potential divider circuit and is connected to the ADC input pin of MCU. Similarly, current flowing through the first LED array A1 is sensed and is connected to another ADC pin. The adapter output voltage VMF is sensed using potential divider circuit and is connected to a digital input (DI) pin of the MCU. This is a digital signal which is used to sense whether adapter power is available or not. One more DO pin is connected to the “adapter standby mode” pin to reduce power consumed by the adapter when all arrays are powered from solar panel and adapter is on no load.

Circuit Diagram

Figure 2 shows the circuit diagram. The adapter output VM is connected to the top (red) rail of the circuit. After passing through diode D19 (1N5822), voltage VMD is applied to the circuit. Similarly, the middle rail (yellow) is connected to the solar panel output Vpv. After passing through diode D20, voltage Vpvd is applied to the circuit. A big filter capacitor C2 (10000 µF 35V) is connected across panel terminals. This capacitor will eliminate sudden changes in panel voltage so that the firmware runs smoothly.

Figure 2 Circuit diagram of the proposed hybrid lamp where the adapter output VM is connected to the top (red) rail of the circuit and to the solar panel output Vpv is connected to the middle rail (yellow).

LED driver circuit for array A1 is shown in full detail. Array A1 consists of 5 white LEDs connected in series. It is connected to the ground terminal through R1; a 10 Ω, 2 W resistor. The voltage drop across R1 (Ipv1) is connected to ADC1 (pin 24) of the MCU IC3 ATMEGA 8 as shown in Figure 3. A1 is driven by two PNP transistors T3 and T4 (2N4033). Transistor T3 is controlled by the digital output PD0 of the MCU through NPN transistor T1 (BC546). The PD0 signal is inverted using the NOT gate of IC1 (74HCT04). This signal drives transistor T2 which drives T4.

When PD0 is LOW → T3 OFF, T4 ON (A1 on solar and green indicator LED2 ON)
When PD0 is HIGH → T3 ON, T4 OFF (A1 on mains and red indicator LED1 ON)

In the same way, remaining arrays A2 to A9 are controlled through their respective digital output signals. Note that resistors R2 to R9 are connected to the anodes of the LED array. This is done to reduce the wiring, as single ground wire connects to all the cathodes of the last LEDs of A2 to A9.

Figure 3 The MCU connection diagram.

The MCU and LED driver circuits are powered using regulator IC4 (LM7805). It’s input is connected to both VMD and Vpvd power rails through D21, D22, R77 and R78. Hence, 5 volts is available on either solar or mains power sources.

Figure 4 shows the circuit diagram of all digital outputs. It includes two 74HCT04 ICs, IC1 and IC2, for inverting a total of 9 digital output signals. The 18 output lines are connected to the LED driver circuits through 18 diodes D1 to D18 (1N4148). Figure 5 shows the assembled PCB with LED driver circuits and the MCU interface.

Figure 4 Interconnection diagram of all digital outputs, 18 output lines are connected to the LED driver circuits through 18 diodes (D1 to D18).

Figure 5 Assembled PCB showing LED driver circuits and MCU interface.

 Adapter (AC-DC converter) selection

Figure 6 shows the adapter used in the prototype having output voltage of 18 V. However, ideally to match the voltage at max power (Vmp) of the solar panel we need 17.5 V. One diode in series can drop the voltage by about 0.7 V. There are adapters available which have provisions for adjusting the output voltage within ±10% tolerance. Using this type of adapter, it is possible to set the output voltage to 17.5V.

Figure 6 Photographs of the 30 Wp, 2’ x 2’ solar panel (top) and 18V, 3 A adapter (bottom). A diode is used to drop the voltage closer to the ideal 17.5 V to match the Vmp of the solar panel.

 Specifications and calculations

The solar panel specifications are as follows:

Power Rating (P) = 30 Wp
Voltage at MAX Power (Vmp) = 17.5 V
Current at MAX Power (Imp) = 1.714 A

The calculations for the LED lamp are as follows:

Forward voltage of white LED = 3.12 V
Current through array A1 = [17.5 – (5 x 3.12)] / 10Ω = 0.19 A
Power consumed by array A1 = 17.5 * 0.19 = 3.325 W
Power consumed by 9 LED arrays = 9 x 3.325 = 29.9 W

Algorithm

As discussed earlier, the hybrid lamp draws power from both solar PV panels and the adapter. If both supplies are present, then it runs a maximum power point tracking (MPPT) algorithm to maximize solar power. Table 1 shows the operating modes.

Table 1 Operating modes of the hybrid lamp. If both supplies are present, the design runs an MPPT algorithm to maximize solar power.

 Variables

The following are the variables used for the algorithm:

n: Number of arrays which are PV Powered (n = 9 is initially set to handle full solar power)
PV_POWER: power drawn from PV panel
PRESENT_MODE: present mode of operation
NEW_MODE: new mode of operation

The permissible numerical values of PRESENT_MODE and NEW_MODE are as follows where valid value(s) of n are indicated in the brackets for each mode:

0: Solar Day Lamp mode (n = 9)
1: Mains Powered mode (n = 0)
2: MPPT (n varies from 1 to 9)

 Constants

The following are the constants used for the algorithm:

POWER_MIN: The minimum value of power. If PV power is < POWER_MIN, then declare solar not present. (POWER_MIN = 1 W or 1600 counts)
P_DELTA: This value is used for generating hysteresis. (P_DELTA = 1 W OR 1600 Counts)
VPV_MIN: This value is used for checking whether PV power is available or not. PV Power is not available if Vpv < VPV_MIN. (16 V OR 800 Counts of ADC0)

Data

The following is the data used for the algorithm:

Array P(n): This data is used by the algorithm to control LED lamps A1 to A9. Table 2 shows the array of constants defined over 10 power levels.

Table 2 An array of constants defined for 10 power levels.

ADC details

The following are the ADC specifications. A count of 1024 corresponds to a 5 V input to the ADC pin:

ADC resolution: 10 bits (1024 counts)
ADC reference voltage = 5 V

Vpv calculations

Solar panel output Vpv calculations are as follows:

VPV_MIN = 16 V (when MPPT is running, Vpv is maintained above VPV_MIN)
ADC input voltage for VPV_MIN = 16 * 0.2444 = 3.91 V
ADC count for 3.91 V = (1024/5) * 3.91 = 801

VPV_MIN calculations

VPV_MIN calculations are as follows:

VPV_MIN = 16 V (when MPPT is running, Vpv is maintained above VPV_MIN)
ADC input voltage for VPV_MIN = 16 * 0.2444 = 3.91 V
ADC count for 3.91 V = (1024/5) * 3.91 = 801

 Ipv calculations

Solar panel output current Ipv calculations are as follows:

Panel power at maximum power point = 30 W
Current at maximum power point = 30/17.5 = 1.714 A
When all arrays A1 to A9 are ON, Current through each array = 1.714/9 = 0.19 A
Drop across 10 Ω resistor R1 = 10 * 0.19 = 1.9 V
ADC Count for 0.19 Amp = (1024/5) * 1.9 = 390 count

Power calculations

Finally, the power calculations can be seen below:

Read ADC0 → Count for VPVS
Read ADC1 → Count for IPV1
PV_POWER_32 = ADC0 * ADC1 * n
PV_POWER = PV_POWER_32 / 64 (Shift right by 6 bits)
PV power generated when one array is ON = 876 * 390 = 341640 counts
PV power generated when 9 arrays are ON (30W) = 341640 * 9 = 3074760 counts

To limit the resolution to 16 bits, the counts are divided by 64:

Count for 30 W -> 3074760 / 64 = 48043.125
Count for 1 W -> 48043/ 30 = 1601.4375 Count or 1600 approx

Flow charts

The flow charts required for development of embedded firmware are given in Figure 7, Figure 8, Figure 9, and Figure 10. At power ON, the algorithm initializes timer, ports, modes and enables timer interrupt. The algorithm is executed inside the timer interrupt service routine.

Figure 7 Initialization flow chart where at power ON, algorithm initializes timer, ports, modes and enables timer interrupt.

Figure 8 A portion of the interrupt service routine where the algorithm is executed.

Figure 9 The rest of the interrupt service routine where the algorithm is executed.

Figure 10 The MPPT flow chart that is run if both supplies are present.

 Fabrication and testing

The LED lamp metal core PCBs (MCPCBs) were mounted on three aluminum channels. The aluminum channels absorb the heat generated by these PCBs and provide structural support. The controller PCB is mounted on the back side of the LED array. The working of hybrid lamp is captured in the photographs shown in Figure 11 and Figure 12 where the lamps are working on 100% solar power and 100% mains power respectively. The lamp is placed in front of a mirror to check the light output from LED array. Simultaneously, we can see the PCB and the indicator LEDs. From these two Figures, it is clearly seen that we get same light output whether the array is solar powered or mains powered.

Figure 11 Lamp working on 100% solar energy (all green indicator LEDs are ON).

Figure 12 Lamp working on 100% mains power (all red indicator LEDs are ON).

In order to capture the dynamic workings of the lamp, when the solar energy is varying and the MPPT algorithm is running, see the video below.

In this video, we are able to see LED array light output in the mirror and also observe the indicator LEDs changing from green to red and vice versa sequentially. In this case, the solar panel is rotated in the sunlight to vary the PV power generated. This video confirms that the MPPT algorithm is working properly as the LED array gives a constant light output when there is wide variation in solar power. One green LED is ON, meaning 11% of the energy is coming from solar. So, depending upon the number of green LEDs that are ON, we can calculate the percentage reduction in the load on the mains power supply.

When the whole array is running on solar power, we can make the digital output line going to the standby input of the adapter high (refer to Figure 1). Thus, reducing the power consumed by the adapter under no-load condition. Please note that this feature has not been implemented in the present code.

 Power ASIC design

The hardware complexity can be reduced by designing a dedicated power ASIC. The main features of the proposed ASIC are as follows:

Number of LED driver circuits: 16
MAX Voltage rating of drivers : 50 V
MAX current rating of each driver: 0.5 A
Regulated control power supply: 5 V, 1A
Sensing circuits for: Vpvs, Ipv1, VM

 Design of a 500 W fixture

Based on the hybrid lamp design given here, a larger lighting fixture can be designed. Here, an example of such a system, which uses a single 500 Wp solar panel is given. The high-level details of proposed design are as follows:           

PV panel specifications: 500 Wp, Vmp = 35 V, Imp = 14.2 A
LED lamp power rating:11 Watts (11 white LEDs connected in series)
Number of lamps: 64 (8 x 8 array)
Number of ASICs required: 4

This lighting fixture can be installed in large shopping centers, hospitals, offices etc., where it will provide constant light while maximizing the utilization of available solar energy. Even on a cloudy day it can reduce the load on the mains supply by 10 to 20%. Such a system will have an ROI of 3 to 4 years. Furthermore, it offers many other benefits such as decentralized design, very short wiring, lower transmission losses and provides light in the daytime if the mains power fails.  

Vijay Deshpande recently retired after a 30-year career focused on power electronics and DSP projects, and now works mainly on solar PV systems.

Related Content and references:

Solar day lamp designs use passive and active current limiting circuits
Solar day lamp designs provide low-cost lighting solutions, Part 1
Solar day lamp designs provide low-cost lighting solutions, Part 2

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