Comparing multi-channel RF transceiver options for space applications

Spacechips has been asked by its clients many times, “Which is the best device?” The answer? “It depends”.
Payload manufacturers are increasingly exploiting the SWaP (size, weight, and oower) advantages of single-chip, multi-channel transceivers, combining DSP and AI with RF ADCs and DACs. These devices offer significant benefits and flexibility to satellite operators, allowing them to change receive and transmit frequency plans in-orbit to deliver better services and more insights.
Using systems based on them, telecommunication operators can achieve better link performance, coverage and spectrum efficiency, while earth-observation users can transmit and receive multiple RF bands within the same orbital pass to monitor different terrains and penetration depths using a single transponder. SIGINT/ELINT operators can monitor UHF to K-band using one radio channel. The following example (Figure 1) illustrates C and Ku-band carriers being simultaneously under-sampled at 3 GSPS with respect to their absolute centre frequencies, but over and bandpass sampled in relation to their information bandwidths.

Figure 1 C and Ku-band carriers digitized at 3 GSPS are simultaneously under-sampled with respect to their absolute center frequencies and over- and bandpass-sampled in relation to their information bandwidths. Source: Spacechips
Evolving market requirements
Satellite applications are increasingly processing wider and instantaneously reconfigurable bandwidths to deliver better services and more value-add. As a designer and manufacturer of software-defined transponders, my company Spacechips considers various single-chip transceivers for different customers. These devices enable operators to change, receive and transmit frequency plans, information bandwidths, modulation and waveform types in-orbit, in response to varying communication and traffic needs.
Integrated, multi-channel semiconductors such as the AMD’s (formerly Xilinx’s) RFSoC and Versal RF, Altera’s Agilex Direct RF, Texas Instruments’ AFE80xx, Jariet Technologies’ Elektra and Analog Devices’ AD9082 offer obvious advantages such as smaller size, lower power consumption and in some cases, elimination of the external interfaces between the ADC/DAC and DSP. I remember doing the layout of the first Spacechips SDR1 prototype, where the digital interface between the ADC and the FPGA required fifty impedance- and length-matched traces, as shown in Figure 2.

Figure 2 ADC LVDS digital outputs (left) connected to a FPGA (right) exemplify legacy system design complexity. Source: Spacechips
Over the past near-two decades, transponder architectures have become increasingly software-defined, with traditional, analogue superheterodyne circuits being replaced by digital and re-configurable logic. The latest, single-chip, multi-channel transceivers offer the potential to deliver true software-defined microwave. My company’s (Spacechips) customers constantly ask questions such as the following:
- Which microchip they should use
- How they can improve ADC/DAC performance when directly processing RF carriers
- If parts will function reliably in space, and if they have heritage
- How can the customers implement in-orbit AI and machine learning, and
- How they should they design-in the parts.
There’s a big difference between:
- Evaluating these devices using development kits that accept a ±1V carrier and looking at its idealized output spectrum, and
- Developing a payload baselining the same part, combining RF and high-speed digital, and delivering the advertised SNR and SFDR from a ‑120 dBm input!
Does your test equipment have the sensitivity and RF bandwidth to prove this amplitude, for example? And there’s also a huge disparity between powering a 10 W and a 120 W semiconductor!
Spacechips provides training on, including demonstrating, the aforementioned AMD, Altera, Texas Instruments, Jariet Technologies and Analog Devices parts; in my next series of posts, I’ll share insights and lessons learned. This first tutorial will introduce devices, compare their specifications, and discuss their respective suitability for satellite applications.
Future posts will share design-in experiences and measurement results. And with that all said, discrete, space-grade, broadband ADCs and DACs up to K-band are also available, some of which offer advantages over these devices, e.g. RF bandwidth, reliability, availability, and space-qualified status. I have previously written about some of these latter options.
AMD RFSoC and Versal RF
Back in 2017, I first posted about AMD’s first-generation RFSoC product family. Gen. 3 integrates a Zynq UltraScale+ MPSoC with 14-bit, 5 GSPS, 6 GHz ADCs and 14-bit, 10 GSPS, 6 GHz DACs (Figure 3). The DFE variant operates up to 7.125 GHz. The original RFSoC was the first semiconductor device to integrate high-speed mixed-signal convertors with an FPGA and Arm Cortex processors, removing the traditional physical interfaces between these respective technologies.

Figure 3 The RFSoC family combines mixed-signal converters with FPGA fabric and Arm processors. Source: AMD
AMD’s Versal RF improves on RFSoC by offering faster and wider bandwidth mixed-signal converters, i.e. 14-bit, 8/32 GSPS, 18 GHz ADCs and 14-bit, 16 GSPS, 18 GHz DACs (Figure 4). The Versal ACAP product range contains dedicated AI engines with vector processors to accelerate machine learning, and AMD plans to formally qualify two devices from the new Versal RF product family: the VR1602 and VR1652 parts.


Figure 4 The Versal RF product family comes in multiple device options with varying ADC and DAC counts and types. Source: AMD
Altera Agilex Direct RF
Conceptually, Altera’s Agilex 9 Direct RF family is similar to RFSoC, but it offers faster and wider-RF bandwidth mixed-signal converters enabling millimeter-wave sensing payloads, i.e. 10-bit, 64 GSPS, 36 GHz ADCs and 10-bit, 64 GSPS, 36 GHz DACs (Figure 5). Higher sampling frequencies enable the digitization and synthesis of wider instantaneous information bandwidths. A lower bandwidth, higher dynamic performance, sixteen channel, 14-bit, 4 GSPS, 7.1 GHz ADC and 14-bit, 12 GSPS, 7.1 GHz DAC version is also available. The Agilex 9 Direct RF FPGA contains robust tensor-capable DSP blocks within its fabric to support SIMD execution to accelerate AI operations.

Figure 5 The Agilex 9 Direct RF FPGA integrates tensor-capable DSP blocks within its programmable fabric. Source: Altera
Texas Instruments AFE80xx
Texas Instruments’ AFE80xx is an integrated RF transceiver offering 14-bit, 4 GSPS, 7.1 GHz ADCs and 14-bit, 12 GSPS, 7.1 GHz DACs (Figure 6). The AFE80xx has eight JESD204B/C serial interfaces to connect to an ASIC or an FPGA at speeds up to 32.5 Gbps per lane. The AFE8010 variant is a ten-channel receiver-only device.

Figure 6 This AFE80xx functional block diagram shows the device’s sizeable single-chip functional integration. Source: Texas Instruments
Jariet Technologies Electra
Jariet Technologies offers the Electra-MA/MK/MX dual-channel transceivers containing two 10-bit, 40 to 64 GSPS ADCs and DACs processing instantaneous bandwidths of 6.4 GHz up to 36 GHz (Figure 7). Elektra devices have sixteen JESD204B/C interfaces to connect to an ASIC or an FPGA at speeds up to 30 Gbps per lane.

Figure 7 Elektra devices’ JESD204B/C interfaces connect to an ASIC or an FPGA at speeds up to 30 Gbps per lane. Source: Jariet Technologies
Analog Devices AD9082
Analog Devices’ AD9082 integrates two, 12-bit, 6 GSPS, 8 GHz ADCs and four 16-bit, 12 GSPS, 8 GHz DACs (Figure 8). The AD9082 has sixteen JESD204B/C interfaces to connect to an ASIC or an FPGA at speeds up to 24.75 Gbps per lane.

Figure 8 The AD9082 integrates multiple high-precision, high-performance ADCs and DACs. Source: Analog Devices
General comments
As noted earlier, Spacechips has been asked many times, “Which is the best device?” Some of our clients need to perform a lot of real-time DSP and/or AI inference on the incoming carrier traffic, so a Versal RF or an Agilex 9 Direct RF may be a better fit for their application. However, several of our other customers do not fit this same definition, and a large, complex, highly-integrated device requiring lots of power rails and watts is therefore likely not their optimum solution.
Two of our clients need more dynamic performance than that offered by ten-bit ADCs/DACs, and exploiting the processing gain from over-sampling is one way to deliver higher SNR. Many users complain about not achieving the advertised data sheet performance and we therefore teach them how to extract every last dB of performance from these parts. Just because a device has a specified sampling/reconstruction clock frequency of Fs GSPS, this does not always result in an information bandwidth close to theoretical Nyquist, i.e. Fs/2 Hz.
For some of our customers, there are financial and programmatic reasons that influence which part to baseline. One of our primary clients, for example, requires a year to approve a new supplier. This timeline did not fit with the project schedule and they resultantly developed an expensive, over-engineered system (in my opinion). For some of our clients, the physical size and/or power consumption of an integrated transceiver may be prohibitive, e.g. a 1U COTS payload might not have an adequate area or financial budget, and its small platform may not be able to generate sufficient energy to supply a power-hungry device.
Other integrated transceivers also exist, of course, but I focus here on the ones that are of most interest to Spacechips and our customers. Most of the devices are part of a wider product suite offering varying numbers of channels, resolutions and sampling speeds. Table 1 summarizes the basic specifications of the six devices and families discussed here.
|
|
RFSoC |
Versal RF |
Direct RF |
AFE80xx |
Elektra |
AD9082 |
|
Architecture |
FPGA, Arm, RX/TX |
FPGA, Arm, RX/TX |
FPGA, Arm, RX/TX |
RX/TX, ADC & DAC |
RX/TX, ADC & DAC |
RX/TX, ADC & DAC |
|
Technology Node |
16 nm FinFET |
7 nm FinEFT |
10 nm SuperFin |
16 nm FinFET |
12nm CMOS |
28nm CMOS |
|
Integrated FPGA |
Yes |
Yes |
Yes |
No |
No |
No |
|
ADC Resolution |
14-bit |
14-bit |
10-bit |
14-bit |
10-bit |
12-bit |
|
Maximum ADC Sampling Rate |
5 GSPS |
32 GSPS |
64 GSPS |
4 GSPS |
40 to 64 GSPS |
6 GSPS |
|
ADC RF Bandwidth |
6 GHz |
~18 GHz |
36 GHz |
7.1 GHz |
36 GHz |
8 GHz |
|
DAC Resolution |
14-bit |
14-bit |
10-bit |
14-bit |
10-bit |
16-bit |
|
Maximum DAC Sampling Rate |
10 GSPS |
16 GSPS |
64 GSPS |
12 GSPS |
40 to 64 GSPS |
12 GSPS |
|
DAC RF Bandwidth |
6 GHz |
~18 GHz |
36 GHz |
7.1 GHz |
36 GHz |
8 GHz |
|
Maximum Instantaneous Bandwidth |
~2 to 4 GHz |
~16 GHz |
> 20 GHz |
0.4 to 1.2 GHz |
6.4 GHz |
~4 to 8 GHz |
|
AI Acceleration |
Fabric |
AI Engines |
Tensor Fabric |
No |
No |
No |
Table 1 A comparison of device specifications covers the companies and products discussed in this blog post. Source: Spacechips
All of the parts discussed here contain integrated DDCs and DUCs to assist with carrier digitization and synthesis, respectively, as well as re-programmability. For fixed frequency plans, bandpass carriers can be directly under-sampled and aliased into the baseband zone (Figure 1). For example, for a 64 GSPS ADC, a 400 MHz-wide signal centered at 25 GHz can be digitized at 1 GSPS (bandwidth over-sampling of 2.5). For wider-band carriers, e.g. SIGINT spectrum monitoring or SATCOM gateways, you do not need to decide beforehand which signal you want; you can digitize the complete Nyquist bandwidth and, using software DDC control, gain, filter and decimate the required signals.
Some of the devices contain multiple independent DDCs to extract separate baseband streams. Decimation lowers the sample rate supplying the FPGA with data, at 1 GSPS versus 64 GSPS as in the above example, reducing memory bandwidth and easing FPGA resource utilization. For CMOS devices, a lower switching speed also reduces power consumption.
On the transmitting side, some of the DACs can directly up-convert baseband to IF/RF images in the higher Nyquist zones, as illustrated in the following example with an update rate of 10 GSPS (FIgure 9). Similarly for wider-band carriers, a DUC can significantly reduce the data bandwidth to the FPGA, interpolating, up-converting, removing unwanted images and flattening the sinc roll-off within the desired passband. Changing frequency plans requires reprogramming the NCO rather than altering the entire analog RF chain.

Figure 9 This graphic shows C and Ku-band carriers in the first and fourth Nyquist zones. Source: Spacechips
None of the parts discussed here were developed specifically for space applications, but several are currently operating in-orbit. All are fabricated using ultra-deep-submicron geometries, e.g. 16 or 7 nm FinFET, 10 nm SuperFin or 28 or 12 nm CMOS, and their thinner oxide as well as general scaling have made them intrinsically tolerant to total-dose changes over the lifetime of a mission. Several also contain process-level radiation-hardening to eliminate single-event latch-up.
Device-level mitigation, e.g. the use of EDAC within fabric memory and triplicated HDL, as well as system techniques, e.g. power-rail monitors, have collectively improved overall reliability sufficiently for certain customers, resulting in very enabling transponder designs. Some of the devices have been irradiated and several are currently being tested in-beam.
Conclusions
My next planned article will describe using, testing and designing-in the devices discussed here, all of which have unique requirements. Please note that the company and product names contained within this writeup are copyrighted and trademarked by their owners!
I’m off to the lab begin testing several the first of the parts. Until next time, the person who shares their best integrated transceiver design-in story in the comments below will win a Spacechips’ Training World Tour tee-shirt. Our global training schedule can be viewed at our website (www.spacechips.co.uk/training_courses), or email us (events@spacechipsllc.com) for more information.
Dr. Rajan Bedi is the CEO and founder of Spacechips, which designs and builds a range of advanced, AI-enabled, re-configurable, L to K-band, ultra high-throughput transponders, SDRs, Edge-based on-board processors and Mass-Memory Units for telecommunication, Earth-Observation, ISAM, SIGINT, navigation, 5G, internet and M2M/IoT satellites. The company also offers Space-Electronics Design-Consultancy, Avionics Testing, Technical-Marketing, Business-Intelligence and Training Services. (www.spacechips.co.uk).
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