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PWMpot approximates a Dpot

Digital potentiometers (“Dpots”) are a diverse and useful category of digital/analog components with up to a 10-bit resolution, element resistance from 1k to 1M, and voltage capability up to and beyond ±15v. However, most are limited to 8 bits, monopolar (typically 0v to +5v) signal levels, and 5k to 100k resistances with loose tolerances of ±20 to 30%.

Wow the engineering world with your unique design: Design Ideas Submission Guide

This design idea describes a simple and inexpensive Dpot-like alternative. It has limitations of its own (mainly being restricted to relatively low signal frequencies) but offers useful and occasionally superior performance in areas where actual Dpots tend to fall short. These include parameters like bipolar signal range, terrific differential nonlinearity, tight resistance accuracy, and programmable resolution. See Figure 1.

Figure 1 PWM drives opposing-phase CMOS switches and RC network to simulate a Dpot

RC ripple filtering limits frequency response to typically tens to hundreds of Hz.

Switch U1b connects wiper node W to node B when PWM = 1, and to A when PWM = 0. Letting the PWM duty factor, P = 0 to 1, and assuming no excessive loading of W:

Vw = P(Vb – Va) + Va

 Meanwhile, switch U1a connects W to node A when PWM = 1, and to B when PWM = 0, thus 180o out of phase with U1b. Due to AC coupling, this has no effect on pot DC output, but the phase inversion relative to U1b delivers active ripple attenuation as described in “Cancel PWM DAC ripple with analog subtraction.”

The minimum RC time-constant required to attenuate ripple to no more than 1 least significant bit (lsb) for any given N = number of PWM bits of resolution and Tpwm = PWM period is given by:

RC = Tpwm 2(N/2 – 2)  

For example:

for N = 8, Fpwm = 10 kHz

RC = 10 kHz-1*2(8/2 – 2)  = 100 µs*22 = 400 µs

The maximum acceptable value for R is dictated by the required Vw voltage accuracy under load. Minimum R is determined by:

Required resistance accuracy after factoring in the variability of U1b switch Ron: r which is 40 ±40Ω for the HC4053 powered as in Figure 1.
Required integral nonlinearity (INL) as affected by switch-to-switch Ron variation, which is just 5 Ω for the HC4053 as powered here.

 R = 1k to 10k would be a workable range of choices for N = 8-bit resolution. N is programmable.

The net result is the equivalent circuit shown in Figure 2. Note that, unlike a mechanical pot or Dpot, where output resistance varies dramatically with wiper setting, the PWMpot’s output resistance (R +r) is nominally constant and independent of setting.

Figure 2 The PWMpot’s equivalent circuit where r = switch Ron, P = PWM duty factor, and where the ripple filter capacitors are not shown.

 Funny footnote: While pondering a name for this idea, I initially thought “PWMpot” was too long and considered making it shorter and catchy-er by dropping the “WM.” But then, after reading the resulting acronym out loud, I decided it was maybe a little too catchy.

And put the “WM” back!

Stephen Woodward’s relationship with EDN’s DI column goes back quite a long way. Over 100 submissions have been accepted since his first contribution back in 1974.

 Related Content

Cancel PWM DAC ripple with analog subtraction
A faster PWM-based DAC
Parsing PWM (DAC) performance: Part 1—Mitigating errors
PWM power DAC incorporates an LM317
Cancel PWM DAC ripple with analog subtraction but no inverter
Cancel PWM DAC ripple with analog subtraction—revisited

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The post PWMpot approximates a Dpot appeared first on EDN.

8 January 2025
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