System control FPGAs provide PCIe connectivity

Low-power MachXO5T-NX FPGAs from Lattice combine hardened PCIe Gen 2 interfaces and enhanced security with increased logic and memory resources. These features allow the FPGAs to be used in a broader set of control function designs and applications for enterprise networking, machine vision, and industrial IoT.

Based on the Lattice Nexus FPGA platform, the MachXO5T-NX series comprises two devices with 53k and 96k logic cells. The PCIe Gen 2 hard IP delivers a high-bandwidth 5-Gbps control path with two PCIe ports (one channel/port). Up to 7.2 Mb of embedded memory minimizes the need for external memory, while 57 Mb of user flash memory stores mission-critical data and parameters. Lattice reports that the MachXO5T-NX FPGAs’ soft error rate is as much as 100 times lower than similar class FPGAs, improving system reliability.

The devices also furnish 291 general-purpose I/Os that support early I/O configuration and provide added features, such as 1.25-Gbps SGMII, default pull-down, hot socketing, and programmable slew rate. Security features include on-chip AES256 bitstream encryption and ECC256 bitstream authentication.

Samples of the MachXO5T-NX FPGAs are available now and supported by the latest release of Lattice Radiant design software. Volume production is planned for Q4 2023.

MachXO5T-NX product page

Lattice Semiconductor 

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