SiC MOSFET touts check-pattern embedded Schottky diodes

Toshiba has developed a SiC MOSFET that arranges embedded Schottky barrier diodes in a check pattern to achieve both low on-resistance and high reliability. The company reports that the design reduces on-resistance (RONA) by approximately 20% compared to its current SiC MOSFET with no loss of reliability.

Bipolar conduction in the body diode during reverse operation of a SiC MOSFET is harmful because it degrades on-resistance. Toshiba worked on a device structure that embedded Schottky barrier diodes (SBDs) in the MOSFET to inactivate body diodes, but found that replacing the MOSFET channel with an embedded SBD lowered channel density and increased RONA. This tradeoff has now been resolved with the new check-pattern embedded SBD structure.

Evaluation of the on-side current characteristics of 1.2-kV SBD-embedded MOSFETs confirmed that using the check design to position the embedded SBDs close to the body diodes effectively limited bipolar conduction of the parasitic diodes. And the unipolar current limit of reverse conduction was double that realized by the current strip-pattern SBD design for the same SBD area consumption. RONA was found to be approximately 20% lower, at 2.7 mΩ·cm2.

The confirmed improvement in the trade-off is essential if SiC MOSFETs are to be used in inverters for motor drive applications. Details of the achievement were reported at the 68th Annual IEEE International Electron Devices Meeting held this month.

Toshiba Electronic Devices & Storage

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