# Binary elements of fractional logic

In this design idea logic elements consisting of two nodes—an input resistive matrix and a threshold module, operating on the basis of fractional logic principles—are proposed. Fractional logic differs in that the input signals of the “Log. 1” level are converted in a resistive matrix into signals of the “Log. 1/*n*” level, where *n* is the number of inputs. Switching of the threshold module occurs if the additive sum of the signals at the input of the threshold element exceeds the switching threshold. Binary elements of fractional logic, due to the use of two housings (nodes), allow replacing an extensive range of housings of multi-input logic elements AND/NAND and OR/NOR, which will significantly simplify and reduce the cost of manufacturing electronic products.

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Binary elements of electronics are called electronic structures consisting of two interconnected circuit nodes. The following is a description of the basic nodes of digital electronics operating on the basis of the principles of fractional logic [1, 2] and made from a combination of two nodes.

The first of these nodes is a resistive matrix, **Figure 1**, whose resistances values meet certain requirements.

**Figure 1** The input resistive matrix of a binary element of fractional logic.

The second node or threshold module, **Figure 2**, contains two comparators with a switching voltage set by resistors R1a and R2b (threshold switching voltage).

**Figure 2** Threshold module of a binary element of fractional logic.

Fractional logic is fully compatible with traditional logic and has the same set of basic elements. Fractional logic differs in that the input signals of the “Log. 1” level in the input circuits of the logic element are converted into signals of the “Log. 1/*n*” level, where *n* is the number of inputs, for example, “Log. 1/2”, “Log. 1/3”, “Log. 1/4”, etc. The sum of the weights all these signals are equal to one (“Log. 1”):

Consider the requirements for resistors of a resistive matrix, Figure 1. In order for the input signals to add up additively on the resistance R2 (the output of the matrix AND), the following condition must be met: R>>(R1+R2); these resistances must differ by about two orders of magnitude.

When the signal “Log. 1” with a voltage Uin is applied to any of the inputs X1–X4, the current I*i=*1 flows through the resistor R:

To switch the comparator, it is necessary that the voltage drop on the resistor R2 in Figure 1 exceeds the switching voltage of the comparator Uth when high-level signals are applied to all inputs of the logic element:

Obviously, for a two-input element AND, the switching of the comparator should occur when signals of the “Log. 1” level are applied to its two inputs, but not when a signal of this level is applied to one of its inputs.

Accordingly, for a three-input logic element AND, switching of the comparator should occur when signals are applied to 3 of its inputs, but not to 2, etc.

For inverters, repeaters (*n*=1), as well as OR and NOR elements with an arbitrary number of inputs, the resistance value of resistors R1+R2 can be determined by the formula:

For OR/NOR logic elements, when the control voltage is applied to any of its inputs, the voltage drop on the resistors R1+R2 will obviously exceed the switching threshold of the threshold element (comparator).

Calculation of R2 at *n*>1 for the logic elements AND, NAND is performed by the formula:

Or for *n*=4:

From here, you can determine the value of the resistance of the resistor R1.

The limiting deviation of input voltages ±ΔUin relative to Uin, at which reliable operation of fractional logic elements with n inputs (*n*>1) is possible, can be defined as:

And, at *n*=4 is ±14.7%.

Under the condition Uin=VCC (operation of the device from a single power source), even with a significant change in the supply voltage, the elements of fractional logic automatically adjust to the optimal operating mode.

The number of inputs for the implementation of the OR function has no restrictions. To implement the AND/NAND function, the number of inputs formally has no restrictions, but for stable and reliable operation of the logic element, it is worth limiting the number of inputs to four.

Connection of three of the four resistors of the resistive matrix (R>>(R1+R2)) to a common bus (if one of the inputs of the logic element is supplied with “Log. 1″, for the other three–”Log. 0”) does not affect of the voltage on the resistor R2.

Options for the synthesis of four-input logic elements 4OR/4NOR or 4AND/4NAND are presented in **Figure 3**.

**Figure 3** Options for obtaining four-input fractional logic elements from two nodes.

In turn, other elements can be obtained from these elements, for example, NOT, 2NAND, and many others (**Figure 4**).

**Figure 4** Options for using fractional logic elements.

To implement the 2XOR/XNOR function as part of the fractional logic elements, a modification of the input node, **Figure 5**, will be required. The resistance values of the resistors of the resistive divider are the same as for the OR/NOR elements.

**Figure 5** The input node of a two-input logic element of fractional logic 2XOR/2XNOR.

**Figure 6** shows alternative options for obtaining 2XOR/2XNOR elements from two nodes.

**Figure 6** Variants of elements of fractional logic 2XOR/2XNOR.

The advantage of binary elements of fractional logic is:

Compatibility with logic elements of previous generations, the ability to work in the range of supply voltages and input signal levels from units to tens of volts.

The possibility of creating fractional logic and using priority inputs, the weight of the logical signals of which is two, three or more times (e.g., 2/3, 3/4) the weight of the logical signals at the usual inputs (1/3 and 1/4, respectively). This will allow you to rank the input signals according to their degree of significance.

Fractional logic elements can work with ternary logic signals whose input levels have the values “Log. –1”; “Log. 0”; “Log. +1”.

Binary elements of fractional logic due to the use of two housings (nodes) allow one to replace an extensive range of housings of multi-input logic elements AND /NAND and OR/NOR, which will significantly simplify and reduce the cost of production of electronic products.

**References**

Shustov M.A. “Fractional logic”, Radiolotsman, 2020, No. 7–8, pp. 34–39. https://www.rlocman.ru/review/article.html?di=621807

ShustovA. “Chip 222 – alternative 555. PWM generator with independent frequency control”, International Journal of Circuits and Electronics, 2021, V. 6, P. 23–31. Pub. Date: 06 September 2021. https://www.iaras.org/iaras/home/computer-science-communications/caijce/chip-222-alternative-555-pwm-generator-with-independent-frequency-control

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